Interrupt ControllerThere are two moments in the life of an interrupt: Negotiation and Service. During the first, the CPU and the interrupter device negotiate the use of the buses until finally the ISR address is passed from the device to the CPU. The second moment starts when the CPU passes control to the ISR (PC loaded with the ISR address) and finishes when the ISR returns and control is passed back to the interrupted routine.
During interrupt negotiation, the Interrupt Controller takes over; this is coordinated by mean of status signals S0, S1 present in the Status Bus (S-BUS).
Once the ISR address has been obtained, the Interrupt Controller saves the Program Counter (PC) and Flags register (F) to the stack. Finally it loads the PC with the ISR address and rises an End Of Interrupt (EOI) signal so the next Op Fetch cycle can take place over the interrupt service routine.
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