References

Table of Content


Content

Original TinyCAD drawings

PDF versions of these drawings are conveniently placed in other sections.


Console (rev. 11)
Console (rev. 12)
CPU Block diagram (rev. 3)
Instruction Decode Example (rev. 3)

Considering

Fail Trap (consideration)

An interrupt called on Fail condition.

This is different from hardware interrupts. Those are requested though channels INT lines and have fixed vector addresses in page zero: 0x000 for channel 0 ... 0x00f for channel 15.

This must enter the Interrupt Controller directly and must also have a fixed vector address, possibly at 0x010.

It must also have a dedicated bit in G register (ftrap) that can be enabled, disabled by software.

Maybe a toggle switch in the Console: TOF (Trap On Fail) to manually enable/disable this trap.

Multiplexed Channels (consideration)

En la practica, tiene sentido acomodar varios perifericos dentro de un solo frame, por ejemplo: 4 puertos serie. Esto consume un canal por cada periferico, necesitandose varios cables (4 en el ejemplo) desde el CPU hasta el frame, lo cual es inconveniente.

Multiplexed channels trata de corregir este problema.

Digamos que se multiplexen 4 canales. El CPU ofrece tanto canales simples como multiplexados en algun esquema (posiblemente fijo) como este:

Channels  0-7 : simples (8 connectors)
Channels  8-11: multipexed (1 connector)
Channels 12-15: multiplexed (1 connector)

External References (Links)

  • DEC six-bit alphanumeric code.