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Organization of the MC EPROM

When the LC-81 is powered-up or reset, a bus request is asserted to the microprocessor so execution at address 0000H can not really start. Nevertheless, an idle loop (jump to 0000H) has been placed there to prevent further execution in case the BUSREQ line is not fired on time.

It follows the table for RST instructions starting at address 0008H. This table is filled with jumps to corresponding addresses in RAM from 2048H to 207fH so external software can make use of RST instructions without having to burn the EPROM. This brings support for RST 08H to RST 32H.

At address 0066H is a jump to a START routine in support to the Console's START button. Then a series of utilities follow.

This content, currently at version 0.44, is temporary. In the future I may find a better use for those 8KB or memory.