FeaturesData Bus : 16 bits
Address Bus : 20 bits (address refers to 16 bit words)
Main Memory : SRAM 1 Mw (2 MB) max.
Operating Modes : Step, Real, Protected
Protection Method : Paging via (not mapped) Multidimensional Matrix (16K x 16)
Multitasking : Up to 16 processes running on separate time-slices.
Peripherals : Memory mapped
Interrupts : Vectored 256 max.
Nested ISR : Yes, based on priority.
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Homebuilt CPUs WebRing
JavaScript by Qirien Dhaela
Join the ring?
David Brooks, the designer of the Simplex-III homebrew computer, has founded the Homebuilt CPUs Web Ring. To join, drop David a line, mentioning your page's URL. He will then add it to the list.
You will need to copy this code fragment into your page.
Project start date: May 13 of 2009
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