Immediate 20 bits nibble highWhen transferring data from a 16-bits register to a 20-bits register, only the 16 least significant bits are copied. The upper nibble can then be supplied by the mean of an "Immediate 20 bits nibble high" instruction which will write the 4 most significant bits leaving the rest untouched.
Example:
mov sp, a ; sp <- least significant 16 bits
movih sp, value ; sp <- most signifant 4 bits (value is 4 bits).
Immediate 20 bits nibble high intructions only takes one step (T1) of the Execute Machine Cycle since the operand is embedded within the op code. No bus operation is performed during this cycle.
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Homebuilt CPUs WebRing
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Project start date: May 13 of 2009
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