Linear Address and PagingA Linear address is 24 bits wide. It is broken into two 12 bits fields: PAGE and OFFSET.
Physical memory is broken into 4 KB blocks of contiguous addresses called "Page Frames". The page frame constitutes the memory allocation unit.
Each page frame is described (and translated) by the corresponding entry (or "Frame") in the Trans Table, as illustrated bellow.
Each process processes its own Trans Table. System Software (OS) is responsible for keeping them updated at boot-up and run-time.
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Homebuilt CPUs WebRing
JavaScript by Qirien Dhaela
Join the ring?
David Brooks, the designer of the Simplex-III homebrew computer, has founded the Homebuilt CPUs Web Ring. To join, drop David a line, mentioning your page's URL. He will then add it to the list.
You will need to copy this code fragment into your page.
Project start date: May 13 of 2009
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