Homebrew Mini-Computer based on Z80 CPU

armandoacostawong@gmail.com

:: LC-81 Facts

-- This page centralizes info for quick reference --

Features

• Modular (extensible) design based on Zilog Z80 eight-bits microprocessor.
• CPU clock: 4MHz. Memory: 8 KB EPROM, 16 KB RAM (Memory is extensible up to 64 KB total).
• Peripherals addressed in separate space (up to 256 devices).
• Simple Interrupt architecture.
• Allows DMA transactions to take place concurrently with application software.

See Also:

• Design Considerations

Console Layout

See Also:

• Operation

Console Block Diagram

See Also:

• Master Controller

External Bus (EXT-BUS)

NOTE: Pin numbers refer to the header 40 POS being used.

LC-81 EXT-BUS	(02/02/2011)
------------------------------------------------------------------------------
Pin #   I/O     Signal          Descript
------------------------------------------------------------------------------
1       I/O     D0              Data or Int Vector
2       I/O     D1
3       I/O     D2
4       I/O     D3
5       I/O     D4
6       I/O     D5
7       I/O     D6
8       I/O     D7
- - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - -
9       O       A0              Address (for I/O, only A0-A7 are used)
10      O       A1
11      O       A2
12      O       A3
13      O       A4
14      O       A5
15      O       A6
16      O       A7
17      O       A8
18      O       A9
19      O       A10
20      O       A11
21      O       A12
22      O       A13
23      O       A14
24      O       A15
- - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - -
25      O       MEC		Memory Cycle
26      O       IOC             I/O Cycle
27      O       RD              Read from Memory or I/O
28      O       WR              Write to Memory or I/O
- - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - -
29      O       IAK             Interrupt Acknowledge
30      O       BSY             Bus Bussy (MC is using the EXT-BUS)
31      O       GND             Circuit Ground
32      O       RST             Master Reset
- - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - -
33      I       IRQ             Interrupt Request (maskable INT)
34      I       BRQ             Bus Request
35      I       HLD             Hold (Z80 Wait input)
- - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - -
36      -       GND             Circuit Ground
37      -       GND             Circuit Ground
- - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - -
38      -       not used
39      -       not used
40      -       not used

Schematics (pdf)

Master Controller unit

• CPU board
• Console Display boards
• Console Registers board
• Console Controller board