Search   
Home  Print View  

 

Overview

Branch Content

Summary

Data Bus            : 16 bits
Address Bus         : 16 bits
Main Memory         : Up to 64 Kwords
Arithmetic          : Signed integer (two's complement)
Inst. decode method : Hard-wired logic

General Purpose regs: B, C, D, E: 16 bits double-buffered to Data and Address buses
Special Registers   : A, PC, SP : Accumulator, Program Counter and Stack Pointer
Hidden Registers    : IR, OR, F : Instruction Reg, Operand Reg and Flags register
Console Registers   : LAR, LDR  : Lamps-Address and Lamps-Data registers
                                  
Real-Time Timer     : 1 ms "computer tic".
Peripherals         : Memory Mapped
Interrupts          : 64K External Interrupts plus 256 vectored Internal Interrupts

Technology          : SSI/MSI HCMOS chips
Construction        : Prototyping boards housed in rack-mount multicard frames.
Clock Speed         : 4 MHz

Homebuilt CPUs WebRing

JavaScript by Qirien Dhaela

Join the ring?

David Brooks, the designer of the Simplex-III homebrew computer, has founded the Homebuilt CPUs Web Ring. To join, drop David a line, mentioning your page's URL. He will then add it to the list.
You will need to copy this code fragment into your page.

Project start date: May 13 of 2009