Indirect Branches (Class 1 branches)These are jump instructions using an indirect address provided by any of the general purpose registers B, C, D or E. Unconditional indirect jump instructions get naturally encoded as a Class 1 instructions:
[1][0][p][PC] Example: JPX E ; 0x1081
For conditional jumps, the jump condition is coded in the OTA field:
[1][condition][p][PC] Example: JNZX E ; 0x1281
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Homebuilt CPUs WebRing
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Join the ring?
David Brooks, the designer of the Simplex-III homebrew computer, has founded the Homebuilt CPUs Web Ring. To join, drop David a line, mentioning your page's URL. He will then add it to the list.
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Project start date: May 13 of 2009
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