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Paged Memory

In order to provide direct addressing in a single-word instruction, the 4K memory space has been broken into 32 pages, 128 words each. The current page number is held in a 5-bits field of register S. The offset (7-bits) withing the page is encoded in the 12-bit instruction's op code.

This way, direct addressing instructions do not address the entire memory but only the current page. Another instruction allows to switch to the desired page. This apparent inconvenience can be camouflaged in assembly language with pseudo-instructions that accept 12-bits addresses to automatically insert a page-switch instruction if necessary.

In the diagram, we can see how bits from registers S and IR are combined to build the 12-bits direct address.