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Assumptions about Devices

    The device is expected to have at least two 12-bits internal registers:
    DATA and CONTROL.

    DATA holds the data to be transferred in one direction or the other;
    CONTROL reports status and accepts commands. A bit (SEL) supplied
    in the channels determines whether the dialog is from/to the DATA or
    the CONTROL register.

    The word length can be less than 12; for example, a Terminal device
    will possibly have only 8 bits data path. In those cases, the device
    must accommodate the used bits in the least significant portion of
    the word, padding the rest with zeros.

    Devices can also have other registers, but those would not be addressable
    by the channel. Some sort of addressing via the CONTROL register would
    be required in such cases.

    The device accepts signals RD, WR to synchronize data transfer. It also
    asserts an interrupt signal (INT) when it feels appropriate and accepts
    an acknowledge signal (ACK) from the channel.

    Devices can also synchronize by using a WAIT signal. When active, the
    CPU delays the read or write cycle waiting from the device to complete
    its part.

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