Introducing the L-BUS8/20/2009
Today I introduced a new CPU internal bus named: L-BUS (Lamps Bus). This 24 lines bus will be present in Data Slots specially for registers.
Registers will write to the L-BUS so its content can be displayed in dedicated LEDs on the Console. At a given time only the selected register writes to the bus (selection comes from the Console). The first 16 lines (L0-15) are for register's content whereas L16-21 show the current status of the register's control signals: CLR, LD, INC, DEC, OTD, OTA. Lines L22 and L23 are wired but not used and always read "inactive" (wired to +5V since all control signals are active low).
Now registers feature a third output buffer (in addition to the two they already had) and a new input control signal named: OTL (Output to Lamps) which selects the register to be shown.
This simple idea have brought three consequences to me:
1.- Registers are now bigger (and more expensive), not very easy to fit more than three of them in a card of 5.5x8 inches.
2.- I can not longer draw for letter-size sheets but for 11x17 inches instead.
3.- The way for the Console's operator to read register's content is now a lot easier.
To be honest I had opposed to this idea until now. That is because I wanted to restrict the Operation to the CPU architecture, that is: if one wanted to see a register content, then he or she needed to open that register to the internal D-BUS (switch OTD, Open to Data Bus).
However, when I started designing the Console's control circuitry, I found that the interconnection between this card and the Master Controller Card were taking too many pins. I found other problems related to selection logic so I decided to "distribute" the selection among register cards, hence the L-BUS.
The Operator (... what operator apart from my self?) will be happy with the new design since now he will be able to watch any register content (as well as their control signals) very easily by just selecting it... not sure if by mean of push buttons or a rotary key.
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