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Memory Bank register: defeated!

A few days ago, I submitted the project to comprehensive revision under severe criticism. I wanted to make sure that all the ideas developed so far were strong enough. Most of them hold; some (such the Interrupt Architecture) resisted not without difficulties. The only one that did not pass was the use of Memory Banks (register MB).

This technique seeks two purposes: (1) To expand the "limited" 64K words memory address space, and (2) to provide a rudimentary hardware support for General Protection in the future. Neither of these arguments proved strong enough; here is why.

From the "historical" point of view, 64K words matches the old-fashioned technology being employed. Most minis in the 60s and 70s came equipped with about 8K words, being 64K a costly luxury. It was using one of those minis (DEC DPD-11) that the UNIX operating system was invented.

From a realistic viewpoint, I'll be writing software in plain Assembly language for a long time. Even when I could envision the developing (or porting) of a full featured operating system in the far future, it is hard to imagine the need for more that 64K words of memory due the kind of software that Heritage/1 will be able to run in practice.

Lets imagine, however, that 64K proved limited at some point in the future. In that case, I will be happy then to accept the challenge to start developing solutions both in software and hardware.

Years will pass before I embark into Protected OS development and chances are for so to never happen at all. Hence the weakness of providing such a support from the very beginning. Besides, I cannot tell if memory banks (allocating different processes in different banks) will actually work.

The removing of the MB from the architecture honors the original idea of having data and address the same size. Software will get simplified by not having to declare the current memory bank. Circuitry will also gain in simplicity.

As per the subjective side of the project, I now feel better to have a decent provision of memory that matches the historicity of the machine being built.

The only thing that is still bodering me is the use of modern SRAM memory chips. That, however, will be very hard to "fix".