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Direct and Indirect ALU operations

06/08/2010

It haven't occurred to me until this precise moment that it's easy to make the ALU to operate with memory variables, directly. It can be done in just 3 clock periods:

T1: Open the Operand Register (OR) to the A-BUS for providing the address.
T2: Memory Read signal (MRD). Also set the desired function to the ALU (for instance, add).
T3: Clock the A register to latch the result.

That is for direct addressing. For indirect we do the same but opening the desired pointer register (for example, D) instead of OR, in T1.

This would add 12 more instructions to the current 73-instructions set for a total of 85. The question is how useful this could be in practice. Let's consider this example that involves three 16-bits variables:

[VAR_R] = [VAR_A] + [VAR_B]

Old way:
---------------------------------------
ld      b, VAR_B      ; 9 cycles
ld      a, VAR_A      ; 9 cycles
add     a, b          ; 5 cycles
sto     a, VAR_R      ; 8 cycles
                      ; total: 31 cycles = 7.75 microseconds

New way:
----------------------------------------
ld      a, VAR_B      ; 9 cycles
addd    a, VAR_A      ; 5 cycles
sto     a, VAR_R      ; 8 cycles
                      ; total: 22 cycles = 5.5 microseconds

Using the new instruction (addd) we do the task 30% faster. Using indirect addressing will be even faster, specially with larger memory structures... consider for instance having to swap all words in a large array.

I'm not sure, however, if I'm going to take this for now. Maybe it is a good opportunity for testing the extensibility of the design; that is, once the machine is completed and functional, to add these new instructions hopefully without having to modify existing circuitry.