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CPU block diagram, theory of operation, time diagrams and schematics are found in this section.
Theory of Operation
CPU Block Diagram
Registers implementation
Flags implementation
Memory implementation
Memory Read Cylcle
Memory Write Cycle
Arithmetic Logic Unit (ALU)
Synchronization
Master Controller
Master Clock oscilator
Encoded Time signals (ET0, ET1, ET2)
Arbiter and Master Status signals (S0, S1)
Instruction Fetch Cycle
Instruction Exec Cycle
Example of a sequence built with combinational logic
Fail Conditions
Invalid Instruction Code
WAIT time out
Fail Trap
List of Internal Control Signals
Timing Diagrams
Schematics
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